DMA Data Transfer Scheme

In DMA data transfer data are directly transferred from an I/O device to the memory or vice versa without going through the microprocessor. The microprocessor(CPU) does not participate in this type of data transfer.This scheme is used when bulk data are to be transferred.If bulk data are transferred through microprocessor,it will be a time consuming process.The microprocessor holds on when data transfer takes place between an I/O device and memory using DMA technique.The I/O device which uses DMA technique of data transfer sends a HOLD signal to the microprocessor.Having received a HOLD request from an I/O devices the microprocessor relinquishes the use of buses(i.e the microprocessor gives up the control of the buses) as soon as the current cycle is completed.it sends HLDA(an HOLD acknowledgement signal) to the I/O devices to indicate that HOLD request has been received,and the data and address buses has been relived.In other words the microprocessor transfers the control of the buses to the I/O devices.Now the I/O device gains control over the buses and transfer takes place at very high speed.This scheme is used to transfer data from mass storage devices like hard disks,floppy disks or high speed printers etc.When data transfer is completed the CPU regains the control over the system buses.

When data are being transferred from I/O devices to the memory or vice versa using DMA technique,the microprocessor is not doing anything and it is in the hold state.The microprocessor can come out of this state only after the DMA request is withdrawn y the I/O device.The duration of the hold state depends on the speed of the I/O device,speed of the memory and the number of data bytes to be transferred.The DMA data transfer in which the I/O device relinquishes the control of the system buses only after all data bytes have been transferred,is called burst mode data transfer.In this mode a block of data   is transferred.This type of DMA data transfer is used by magnetic disk drives where data transmission cannot be stopped or slowed down without loss of the data and hence block transfer is a must.The block data transfer may require the CPU to remain inactive for relatively longer period.Another DMA data transfer scheme called cycle stealing allows the DMA controller to use the system bus to transfer one or perhaps several data bytes,after which it must return the control of buses to the CPU.In this technique a long block of data can be transferred by a sequence of DMA bus transaction interspersed with CPU bus transaction.Though this method reduces the maximum I/O data transfer rate,it also reduces the interference by the DMA controller in the CPU's activities.The interference can be eliminated completely by designing DMA interface in such a way that bus cycles are stolen only when the CPU is actually not using the system bus.This is known as Transparent DMA.